Last week, Intel announced to the semiconductor industry that it was scrapping plans to bring its Larrabee project to market. Bill Kircos, Director of Product and Technology Media Relations, wrote in a blog post that the company was going to strengthen its funding for integrated graphics, as well as pursue Larrabee-based opportunities in the High Performance Computing (HPC) market.
As a highly parallelized architecture, Larrabee is not dead. According to several internal sources, the majority of engineers and designers that worked laboriously on the project have been transitioned to work on Intel’s integrated graphics as it becomes a new focus point in the company’s product portfolio.
With a recent announcement made at International Supercomputing Conference (ISC) 2010 in Hamburg, Germany, the company plans to deliver new products for the high-performance computing segments such as exploration, scientific research and financial or climate simulation. The new architecture, named Intel Many Integrated Core (MIC), is expected to leverage both Larrabee and Intel’s many core research projects.
The first Intel MIC product, codenamed “Knights Corner,” will be made on the 22nm half-pitch manufacturing process. By trusting in the continued scalability of Moore’s Law, the company hopes to implement more than 50 processing cores on a single chip. The key phrase here is “more than 50,” although the company has not set an exact core count for its first MIC-based product.
Industry design and development kits codenamed “Knights Ferry” are currently shipping to select customers and will deliver an extensive range of developer tools as well as documentation for optimization techniques on the MIC architecture. According to Sverre Jarp, CTO of CERN openlab,"The CERN openlab team was able to migrate a complex C++ parallel benchmark to the Intel MIC software development platform in just a few days.” Although the vast majority of highly parallelized workloads still run best on Intel Xeon processors, Intel is stressing the ease at which customers can port existing x86 code to Knights Corner. In perspective, the company’s dependence on code compatibility with existing customer investments is Intel’s leveraging strategy against Nvidia's Tesla solutions.
As such, we expect that Intel may see a quick ramp of MIC architecture adoption in the high-performance computing space than Nvidia has seen with its Tesla architecture.
Kirk Skaugen, Vice President and General Manager of Intel Data Center Group, holding a 22nm SRAM test wafer during his ISC keynote